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Responsible for IC full-custom analog/mix-signal
CHIP/IP layout
Verification of the layout (DRC/ERC/LVS)
RC extraction for post simulation
Assist in project tapeout.
Cooperate with design team in Germany
Qualifications
BSEE with 2+ years of CMOS analog/mix-signal
layout experience
Familiar with Cadence and Calibre/Assura layout
and verification tools
Understanding of basic CMOS circuits is a must
Understanding of CMOS process is a must
Work experience in an international team
Dedicated, hardworking and good team player
English language skill in writing and speaking
is a must
Additional Information
Internal referral bonus of this vacancy: RMB3000(Valid only for Bosch associates);
任职要求:
1.学历:大专或以上学历;
2.微电子相关专业;
3.1年以上相关工作经验;
4.熟练使用Cadence进行ICLayout设计;
5.熟悉draculaDRC及LVS验证;
6.对CMOS有一定的了解;
7.工作认真、耐心细致、有团队合作精神。
岗位职责:
1.必须有在芯片公司工作的经验;
2.按照工艺设计规则、设计产品的版图;
3.对产品版图进行规则检查,电路与版图匹配检查;
4.完成用于生产加工的产品最终设计。
公司:深圳市德信创微电子有限公司