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Responsible for IC full-custom analog/mix-signal
CHIP/IP layout
Verification of the layout (DRC/ERC/LVS)
RC extraction for post simulation
Assist in project tapeout.
Cooperate with design team in Germany
Qualifications
BSEE with 2+ years of CMOS analog/mix-signal
layout experience
Familiar with Cadence and Calibre/Assura layout
and verification tools
Understanding of basic CMOS circuits is a must
Understanding of CMOS process is a must
Work experience in an international team
Dedicated, hardworking and good team player
English language skill in writing and speaking
is a must
Additional Information
Internal referral bonus of this vacancy: RMB3000(Valid only for Bosch associates);
任職要求:
1.學歷:大專或以上學歷;
2.微電子相關專業;
3.1年以上相關工作經驗;
4.熟練使用Cadence進行ICLayout設計;
5.熟悉draculaDRC及LVS驗證;
6.對CMOS有一定的瞭解;
7.工作認真、耐心細緻、有團隊合作精神。
崗位職責:
1.必須有在芯片公司工作的經驗;
2.按照工藝設計規則、設計產品的版圖;
3.對產品版圖進行規則檢查,電路與版圖匹配檢查;
4.完成用於生產加工的產品最終設計。
公司:深圳市德信創微電子有限公司